To increase density in a flash memory device, multi-level cells are used. Such multi-level cells may be, for example, programmed to with one of four voltage levels with each of the four voltage levels representing a two bit binary value. When reading such a multi-level cell, a read back voltage is compared with a center voltage threshold to determine the least significant bit of the two bit binary value and additional comparisons are performed with an upper voltage threshold and a lower voltage threshold to determine the most significant bit of the two bit binary value. Use of multiple comparisons to yield the two bit binary value results in considerable latency.
Hence, for at least the aforementioned reasons, there exists a need in the art for advanced systems and methods for storing and accessing data to/from a flash memory.